| Military/High-Rel: | N |
| Tech.: | CMOS |
| Total Number of Arrays: | 8 |
| Total # of Logic Cell (macros): | 128 |
| # of Cells (macros) Per Array: | 16 |
| Total Number of Product Terms: | 640 |
| # of Product Terms Per Array: | 80 |
| # of Inputs From Switch Matrix: | 36 |
| Number of Input Terminals: | 4 |
| Number of I/O Terminals: | 64 |
| Digital Input V Max (V): | 7.0 |
| I(IL) Maximum (A): | 10u |
| I(IH) Maximum (A): | 10u |
| Output Config: | 3-State |
| Output Logic Polarity: | Programmab |
| VOL Max.: | 0.45 |
| @Iol (A): | 12m |
| t(PLH) Maximum (S): | 15n |
| t(PHL) Maximum (S): | 15n |
| Nom. Supp (V): | 5 |
| Maximum Operating Temp (øC): | 70 |
| Package Style: | QCC-J |
| Mounting Style: | S |
| # Pins: | 68 |
| WV=89% ó PIV Indicated | “ |
| Description: | 8 LABs;shareable/parallel expanders |
